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Hardware Security Project

Side-channel Attack Standard Evaluation BOard - SASEBO

Side-channel Attack Standard Evaluation Board (SASEBO)>Site Map

Site Map

  • HOME
  • SASEBO Project
    • Overview
    • SASEBO
    • SASEBO-G
    • SASEBO-GII
    • SASEBO-B
    • SASEBO-R
    • SASEBO-W
    • Cryptographic LSI & IP Cores
    • Physical Analysis Attack
    • Quick Start Guide
  • DPA Contest
  • SHA-3 Hardware
    • Overview
    • FPGA and ASIC Implementation
    • H/W Optimization
  • PUF
  • Publication
  • Links
  • Conditions and Restrictions
  • Site Map
Side-channel Attack Standard Evaluation Board (SASEBO)/Page Top
  • HOME
  • SASEBO Project
    • Overview
    • SASEBO
    • SASEBO-G
    • SASEBO-GII
    • SASEBO-B
    • SASEBO-R
    • SASEBO-W
    • Cryptographic LSI & IP Cores
    • Physical Analysis Attack
    • Quick Start Guide
  • DPA Contest
  • SHA-3 Hardware
    • Overview
    • FPGA and ASIC Implementation
    • H/W Optimization
  • Publication
  • Links
  • Site Map

Last modified: April 1, 2012

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