文献

英文論文誌

Secure implementation of cryptographic modules---Development of a standard evaluation environment for side channel attacks

Akashi Satoh, Toshihiro Katashita, and Hirofumi Sakane,
Synthesiology, Vol.3, No.1, pp.56-65, July 2010.

High-Performance Hardware Archuitectures for Galois Counter Mode

Akashi Satoh, Takeshi Sugawara, and Takafumi Aoki,
IEEE Transaction on Computer, vol. 58, no. 7, pp. 917-930, July 2009.

A High-Resolution Phase-Based Waveform Matching and Its Application to Side-Channel Attacks

Naofumi Homma, Sei Nagashima, Takeshi Sugawara, Takafumi Aoki, Akashi Satoh,
IEICE Transactions, vol. 91-A, no. 1, pp. 193-202, January 2008.

国際会議

A Fast Power Current Analysis Methodology Using Capacitor Charging Model for Side Channel Attack Evaluation,

Daisuke Fujimoto, Makoto Nagata, Toshihiro Katashita, Akihiko Sasaki, Yohei Hori, and Akashi Satoh,
IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2011), Proceedings of HOST 2011, #P35, pp.87-92, June 2011.

Quantitative and Statistical Performance Evaluation of Arbiter Physical Unclonable Functions on FPGAs,

Yohei Hori, Takahiro Yoshida, Toshihiro Katashita, and Akashi Satoh,
6th International Conference on Reconfigurable Computing and FPGAs (ReConFig 2010), Proceedings of ReConFig 2010, pp.298-303, December 2010.

Biasing power traces to improve correlation power analysis attacks,

Yongdae Kim, Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, and Akashi Satoh,
, First International Workshop on Constructive Side-Channel Analysis and Secure Design 2010 (COSADE 2010), Proceedings of COSEADE 2010, pp.77-80, February 2010.

DPA Characteristic Evaluation of SASEBO for Board Level Simulations,

Toshihiro Katashita, Akashi Satoh, Katsuya Kikuchi, Hiroshi Nakagawa and Masahiro Aoyagi,
, First International Workshop on Constructive Side-Channel Analysis and Secure Design 2010 (COSADE 2010), Proceedings of COSEADE 2010, pp.36-39, February 2010.

Side Channel Attack to Magnetic Near Field of Cryptographic LSI and its Countermeasure by means of Magnetic Thin Film,

Masahiro Yamaguchi, Hideki Toriduka, Shoichi Kobayashi, Takeshi Sugawara, Naofumi Homma, Akashi Satoh, and Takafumi Aoki,
, 19th Soft Magnetic Materials Conference, (SMM19), Proceedings of SMM19, No. A3-11, September 2009.

Is the Differential Frequency-based Attack Effective against Random Delay Insertion?,

Ye Lu, Kean Hong Boey, Maire O'Neill, John. V. McCanny, and Akashi Satoh,
, IEEE Workshop on Signal Processing Systems (SiPS 2009), Proceedings of SiPS 2009, October 2009.

A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques

Daisuke Suzuki, Minoru Saeki, Koichi Simizu, and Akashi Satoh,
Cryptographic Hardware and Embedded Systems (CHES 2009), Lecture Notes in Computer Science, vol., September 2009.

Differential Power Analysis of AES ASIC Implementations with Various S-box Circuits

Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, and Akashi Satoh,
Proceedings of European Conference on Circuit Theory and Design 2009 (ECCTD '09), August 2009.

Development of Side-channel Attack Standard Evaluation Emvironment

Toshihiro Katashita, Akashi Satoh, Takeshi Sugawara, Naofumi Homma, and Takafumi Aoki,
Proceedings of European Conference on Circuit Theory and Design 2009 (ECCTD '09), August 2009.

Mechanism behind Information Leakage in Electromagnetic Analysis of Cryptographic Modules

Takeshi Sugawara, Yuichi Hayashi, Naofumi Homma, Takaaki Mizuki, Kohei Omura, Shigeki Minegishi, Takafumi Aoki, and Akashi Satoh,
Proceedings of the 10th International Workshop on Information Security Applications (WISA 2009), August 2009.

An Analysis of Information Leakage from a Cryptographic Hardware via Common-Mode Current

Yuichi Hayashi, Takeshi Sugawara, Y. Kayano, Naofumi Homma, Takaaki Mizuki, Akashi Satoh, Takafumi Aoki, Shigeki Minegish, Hideaki Sone, and Hiroshi Inoue,
Proceedings of 2009 International Symposium on Electromagnetic Compatibility (EMC '09), July 2009.

Spectrum Analysis on Cryptographic Modules to Counteract Side-Channel Attacks

Takeshi Sugawara, Yuichi Hayashi, Naofumi Homma, Takafumi Aoki, Takaaki Mizuki, Hideaki Sone, and Akashi Satoh,
Proceedings of 2009 International Symposium on Electromagnetic Compatibility (EMC '09), July 2009.

Compact and High-speed Hardware Architectures for Hash Function Tiger

Akashi Satoh,
Proceedings of 2008 IEEE International Symposium on Circuits and Systems (ISCAS 2009), May 2008.

Evaluation of Simple/Comparative Power Analysis against an RSA ASIC Implementation

Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, and Akashi Satoh,
Proceedings of 2008 IEEE International Symposium on Circuits and Systems (ISCAS 2009), pp. 2918-2912, May 2009.

An Experimental Comparison of Power Analysis Attacks against RSA Processors on ASIC and FPGA

Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, and Akashi Satoh,
Proceedings of 14th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2009), pp. 58-63, March 2009.

Enhanced Correlation Power Analysis using Key Screening Technique

Takeshi Sugawara, Naofumi Homma and Takafumi Aoki, and Akashi Satoh,
Proceedings of 2008 International Conference on Reconfigurable Computing and FPGAs (Reconfig '08), pp. 403-408, December 2008.

Systematic design of high-radix Montgomery multipliers for RSA processors

Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, and Akashi Satoh,
Proceedings of IEEE International Conference on Computer Design (ICCD 2008), pp. 403-408, October 2008.

Compact ASIC Architectures for the 512-bit Hash Function Whirlpool

Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, and Akashi Satoh,
Workshop on Information Security Applications (WISA 2008), September 2008.

Systematic design of high-radix Montgomery multipliers for RSA processors

Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, and Akashi Satoh,
The 26th IEEE International Conference of Computer Design (ICCD 2008), October 2008.

Chosen-Message SPA Attacks against FPGA-based RSA Hardware Implementations

Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, and Akashi Satoh,
International Conference on Field Programmable Logic and Applications (FPL 08), September 2008.

Bitstream Encryption and Authentication with AES-GCM in Dynamically Reconfigurable Systems

Yohei Hori, Akashi Satoh, Hirofumi Sakane, and Kenji Toda,
International Conference on Field Programmable Logic and Applications (FPL 08), September 2008.

Collision-based Power Analysis of Modular Exponentiation Using Chosen-message Pairs

Naofumi Homma, Atsushi Miyamoto, Takafumi Aoki, Akashi Satoh, and Adi Shamir,
Cryptographic Hardware and Embedded Systems (CHES 2008), Lecture Notes in Computer Science, vol. 5154, August 2008.

High-performance Concurrent Error Detection Scheme for AES Hardware

Akashi Satoh, Takeshi Sugawara, Naofumi Homma, and Takafumi Aoki,
Cryptographic Hardware and Embedded Systems (CHES 2008), Lecture Notes in Computer Science, vol. 5154, pp. 100-112, August 2008.

Enhanced Power Analysis Attack Using Chosen Message Against RSA Hardware Implementations

Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, and Akashi Satoh,
Proceedings of 2008 IEEE International Symposium on Circuits and Systems (ISCAS 2008), (poster), May 2008.

High-performance ASIC Implementations of the 128-bit Block Cipher CLEFIA

Taksehi Sugawara, Naofumi Homma, Takafumi Aoki, and Akashi Satoh,
Proceedings of 2008 IEEE International Symposium on Circuits and Systems (ISCAS 2008), pp. 2925-2928, May 2008.

ASIC Hardware Implementations for 512-Bit Hash Function Whirlpool

Akashi Satoh,
Proceedings of 2008 IEEE International Symposium on Circuits and Systems (ISCAS 2008), pp. 2917-2920, May 2008.

High-Speed Pipelined Hardware Architecture for Galois Counter Mode

Akashi Satoh,
Information Security Conference 2007 (ISC 2007), Lecture Notes in Computer Science, vol. 4779, pp. 118-129, October 2007.

ASIC performance comparison for the ISO standard block ciphers

Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, and Akashi Satoh,
The 2nd Joint Workshop on Information Security (JWIS2007), pp. 485-498, August 2007.

High-Speed Parallel Hardware Architecture for Galois Counter Mode

Akashi Satoh,
Proceedings of 2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007), pp.1863 - 1866, May 2007.

A High-performance ASIC Implementation of the 64-bit Block Cipher CAST-128

Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, and Akashi Satoh,
Proceedings of 2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007), pp. 1859 - 1862, May 2007.

SPA against RSA processor with High-Radix Montgomery Multiplier on an FPGA

Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, and Akashi Satoh,
Proceedings of 2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007), pp. 1847 - 1850, May 2007.

DPA using Phase-Based Waveform Matching against Random-Delay Countermeasure

Sei Nagashima, Naofumi Homma, Yuichi Imai, Takafumi Aoki, and Akashi Satoh,
Proceedings of 2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007), pp. 1807 - 1810, May 2007.

High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching

Naofumi Homma, Sei Nagashima, Yuichi Imai, Takafumi Aoki, and Akashi Satoh,
Cryptographic Hardware and Embedded Systems (CHES 2006), Lecture Notes in Computer Science, vol. 4249, pp. 187-200, October 2006.