Quick Start Guide

SASEBO Quick Start Guide provides serial interfaces and a sample program to control SASEBO/SASEBO-G/SASEBO-B/SASEBO-GII. Verilog-HDL source codes for Xilinx^® FPGAs are also available. A sample AES circuit with a composite field S-Box is integrated on the target FPGA xc2vp7 and xc5vlx30/50 for SASEBO/SASEBO-G and SASEBO-GII, respectively. All the block ciphers except the public-key cipher RSA in the target LSI are supported for SASEBO-R.

• SASEBO Quick Start Guide Ver. 1.0 (English)(pdf 1.56MB)
• SASEBO Quick Start Guide Ver. 1.0 (Japanese)(pdf 1.71MB)
• SASEBO Quick Start Guide Source and Binary Codes(zip 1.37MB)
• SASEBO-GII Quick Start Guide Ver. 1.0(pdf 756KB)
• SASEBO-GII Quick Start Guide Source and Binary Codes(zip 4.44MB)
• SASEBO-R Quick Start Guide Ver. 1.0(pdf 419KB)
• SASEBO-R Quick Start Guide Source and Binary Codes(zip 1.47MB)
• SASEBO-W Quick Start Guide Ver. 1.0(pdf 1.01MB)
• SASEBO-W Quick Start Guide Source and Binary Codes(zip 2.32MB)