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DPA contest

AES circuit on SASEBO-GII, a Windows waveform acquisition and CPA tool, and support documents for the 3rd DPA contest are available here.

SHA-3 hardware

Hardware performances of 14 second-round candidate algorithms are compared in ASIC and FPGA implementations. All the hardware source codes are available.

Power Analysis Attacks on SASEBO

This report provids experimental results of various power analysis attacks on the AES and RSA circuits, in which the cryptographic IC on SASEBO-R and the Xilinx FPGA on SASEBO-G were used.


Tne biometric approach was introduced for quantitative evaluation of PUF. A challenge-response data set aquired from arbiter PUFS on 45 SASEBO-GII boards, and MATLAB source code for the data analysis are available.

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